Advanced Embedded Digital Engineer
Honeywell Aerospace · San Diego, CA
$118,000–$148,000from the description
Jul 6, 2026
San Diego, CA
Jul 21, 2026
What this job asks for AI summary
A senior-level embedded digital engineering role focused on designing and delivering digital hardware and firmware for radar and Electronic Warfare systems. Day-to-day work spans FPGA architecture and VHDL coding, circuit card design, microcontroller firmware, and integration with RF subsystems — from early concept through production. The role also involves mentoring junior engineers and suits someone with at least five years of hands-on FPGA and circuit card development experience.
Senior level · 5+ years · San Diego-Chula Vista-Carlsbad, CA · Bachelor's required · Secret clearance · Full-time
“or” means any one of them counts — you don't need all of them.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Rare in this occupation — lead with these, and say what you built with them.
What the occupation pays Median $166,860 (middle half $131,418–$198,246). This posting is about at that midpoint.
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.
Why we read it this way (9)
This role is primarily hardware/firmware-focused (FPGA design, circuit card development, embedded microcontroller code) rather than traditional software development. 15-1252 is the closest available SOC; 15-1299 (Computer Occupations, All Other) is noted as a runner-up given the heavy digital/embedded hardware emphasis.
The JD requires the ability to obtain and maintain a security clearance but does not specify the level. Given the defense/aerospace context (radar, EW/SIGINT) and the 'WE VALUE' section listing an active clearance as preferred, Secret is the most reasonable minimum gate — the exact level is not stated.
Altera Quartus and Xilinx Vivado appear together as a single required gate ('Direct job experience using Altera Quartus or Xilinx Vivado'); they are captured as alternatives of each other. Both also appear under 'WE VALUE' as preferred proficiency, but the hard gate in 'YOU MUST HAVE' governs.
MATLAB, Simulink, Xilinx System Generator, and Altera Platform Designer are listed under 'WE VALUE' with a 1-year experience qualifier and an 'or' relationship — treated as preferred alternatives of one another.
ADC and DAC experience is listed under 'WE VALUE' alongside RF/Microwave systems; the 2-year figure applies to the RF/Microwave requirement as stated. ADC/DAC are captured as preferred.
Coding/scripting languages (C/C++, Python, Lua, TCL) and digital interface standards (I2C, SPI, JESD204, PCIe, Ethernet) all appear under 'WE VALUE' and are marked preferred.
The role explicitly requires US Person status under export control laws, which is a legal eligibility gate separate from the security clearance requirement.
Ignored 2 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): FPGA development, circuit card design.
Requires a Secret clearance — the cleared population is a small fraction of this occupation, so the real candidate pool is materially smaller than the estimate below, which does not model clearance.
Read the full posting
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