MaxLinear · Carlsbad, CA

Salary
$167,000–$206,000
Posted
Jul 6, 2026
Location
Carlsbad, CA
Last confirmed open
Jul 20, 2026

What this job asks for AI summary

Senior level · 7+ years · San Diego-Chula Vista-Carlsbad, CA · Bachelor's required · Full-time

Pay in the description: $167,000–$206,000

Must have (8)
C/C++embedded softwareRTOSDSPSoCmulti-core processorssilicon bring-upFPGA
Nice to have (7)
Ethernetoptical networkingSerDesJTAGPythonCI/CDAgile

We read this from the posting text with AI. Skim the description below before ruling yourself out.

How this req sits in the market our data

What gives you an edge
RTOS6%

Rare in this occupation — lead with these, and say what you built with them.

What the occupation pays Median $211,286 (middle half $169,099–$267,976). This posting is about at that midpoint.

Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.

Why we read it this way (6)

The title carries no seniority level word, so the title states no level; the actual scope (team leadership, people management, performance reviews, cross-functional ownership) clearly maps to a people-management role at the Senior band.

The role is a genuine engineering manager position with direct reports, performance reviews, and hiring/career-development responsibilities — hence 11-3021 (Computer and Information Systems Managers). The alt code 15-1252 reflects the strong hands-on technical component (silicon bring-up, code review, architecture review) described throughout.

Degree requirement: the JD states 'BS … 9 years, or MS … 7 years, or Ph.D. … 4 years' as a combined gate. A Bachelor's is the minimum formal degree listed; the overall years minimum is set to 7 (the MS path, which is the middle option and the most common for this level), but the BS+9 path is also valid.

FPGA appears in the required responsibilities section ('FPGA/emulation platforms') rather than an explicit skills list, but it is clearly a hard gate given the bring-up duties described.

Optical networking, SerDes, Ethernet, JTAG, Python, CI/CD, and Agile all appear under the 'Preferred Experience' heading and are marked accordingly.

Compensation includes base salary plus annual discretionary bonus and stock-based compensation (ESPP); only the base salary range is quoted numerically.

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