Embedded Software Engineer
Hark · San Jose, CA
$120,000–$300,000from the description
Jul 15, 2026
San Jose, CA
Jul 21, 2026
What this job asks for AI summary
A firmware engineering role focused on building and owning the embedded software stack for consumer AI hardware devices. Day-to-day work spans board bring-up, peripheral driver development, RTOS task scheduling, power and thermal optimization, and OTA update infrastructure, with close collaboration across hardware, AI, and product teams. Suited to embedded engineers comfortable in C/C++ on ARM-based SoCs working within tight memory and latency constraints.
Mid level · 3+ years · National · Full-time
“or” means any one of them counts — you don't need all of them.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Rare in this occupation — lead with these, and say what you built with them.
What the occupation pays Median $138,970 (middle half $107,524–$175,762). This posting is about at that midpoint.
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.
Why we read it this way (10)
No work location is specified in the posting; the role is at an AI hardware startup (Hark) with no city or state mentioned. CBSA and state fields are left blank.
SOC classification is a judgement call: firmware/embedded development is primarily software work targeting constrained hardware (15-1252 Software Developers), but some classifiers place dedicated embedded/firmware engineers under 15-1299 (Computer Occupations, All Other) — listed as the runner-up.
The title carries no seniority level; the 3+ years requirement and scope (owning a firmware stack, cross-team collaboration, shipping to consumers) most closely maps to Mid-level, though the very wide comp range ($120K–$300K) suggests the company may be open to a broader band.
C and C++ are listed together as 'C and/or C++' in the requirements — emitted as two separate skills each marked required, reflecting that either satisfies the gate.
ARM Cortex-M and Cortex-A are listed together as interchangeable processor families; emitted as one skill with the other as an alternative.
BLE, Wi-Fi, and Thread are listed as interchangeable wireless protocol options ('or'); emitted as one skill with the others as alternatives.
FreeRTOS and Zephyr are listed as interchangeable RTOS options; emitted as one skill (FreeRTOS) with Zephyr as an alternative, alongside a general RTOS skill reflecting the broader gate.
Power optimization, secure boot/firmware signing, ML inference runtimes, and EVT/DVT/PVT experience all appear under 'Bonus Qualifications' and are marked preferred. 'EVT/DVT/PVT milestones' is a process/methodology concept with no specific tool name and was omitted per extraction rules.
OTA update infrastructure is called out as a direct responsibility in the job description and is treated as a required skill given the firm ownership language ('Build and maintain').
Ignored 1 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): power optimization.
Read the full posting
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