Astera Labs · San Jose, CA

Salary
$160,000–$200,000from the description
Posted
Jul 17, 2026
Location
San Jose, CA
Last confirmed open
Jul 21, 2026

What this job asks for AI summary

A tech lead firmware engineering role focused on designing and building firmware and microcontroller subsystems for SoC and systems products in the connectivity semiconductor space. The work centers on implementing core product features, developing embedded firmware for on-chip microcontrollers, building C-based SDKs for system management controllers, and collaborating with hardware designers on HW-SW interfaces. The role also involves direct customer engagement to ensure product requirements are well understood.

Senior level · 5+ years · San Jose-Sunnyvale-Santa Clara, CA · Bachelor's required · Full-time

Must have (8)
PCIeC or C++PythongccMakeDoxygenGitHubembedded firmware
Nice to have (5)
DDR ControllersNVMe ControllersAMBA/AHBPAM4 SerDesEthernet

“or” means any one of them counts — you don't need all of them.

We read this from the posting text with AI. Skim the description below before ruling yourself out.

How this req sits in the market our data

Roughly 120 people in the San Jose-Sunnyvale-Santa Clara, CA area plausibly meet what this posting asks for (software developers). range 30–160

Applicant volume Moderate — A normal amount of company. The rare requirements below are what will separate a shortlisted application from the rest.

What gives you an edge
PCIe2%Doxygen4%

Rare in this occupation — lead with these, and say what you built with them.

What won't set you apart
Python51%

Most people in this occupation already list these. Still required — just not what gets you shortlisted.

What the occupation pays Median $217,796 (middle half $177,469–$231,052). This posting is about at that midpoint.

Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.

Why we read it this way (9)

The title is 'Firmware Engineer Tech Lead' with no explicit seniority level word; the title states no level accordingly. The 5+ years requirement and tech-lead scope support a Senior classification.

Location is not explicitly stated in the posting. Astera Labs is headquartered in Santa Clara, CA; the CBSA has been inferred from that. Candidates should verify the work location.

The role sits at the boundary between embedded firmware (15-1252 Software Developers) and hardware/EE work. The primary day-to-day deliverables are firmware and SDK code, so 15-1252 was chosen; an EE-focused hardware role would not fit any listed SOC.

C is listed as the preferred language ('C preferred') with C++ as an acceptable alternative; both are captured under a single skill with C++ in alternatives.

BMC SDK development and SoC firmware development are captured as distinct skills reflecting the two explicit firmware contexts described in the Required Experience section (on-chip microcontrollers and system management controllers).

DDR Controllers, NVMe Controllers, AMBA/AHB, PAM4 SerDes, and Ethernet are listed under 'Familiarity with' or 'Preferred Experience' sections and are therefore marked as preferred.

A Master's degree is explicitly preferred but not required; the hard minimum stated is a Bachelor's in EE or CS, so the degree requirement is set to Bachelors.

The posting requires US work authorization ('Authorized to work in the US') but does not gate on a security clearance.

Ignored 2 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): SoC firmware development, BMC SDK development.

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