Sr. FPGA Engineer I/II
Rocket Lab Corporation · Long Beach, CA
$143,300–$238,700
Jun 30, 2026
Long Beach, CA
Jul 21, 2026
What this job asks for AI summary
This role centers on designing and verifying FPGA firmware for avionics systems aboard spacecraft, working across the full development lifecycle from requirements definition through on-orbit testing. The position suits an experienced FPGA engineer with a background in VHDL and digital design fundamentals, and involves collaboration across engineering disciplines on civil, commercial, and defense satellite programs. Two seniority tiers are available, distinguished by years of experience.
Senior level · 5+ years · Los Angeles-Long Beach-Anaheim, CA · Bachelor's required · Full-time
“or” means any one of them counts — you don't need all of them.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Roughly 240 people in the Los Angeles-Long Beach-Anaheim, CA area plausibly meet what this posting asks for (software developers). range 180–310
Applicant volume Moderate — A normal amount of company. The rare requirements below are what will separate a shortlisted application from the rest.
Rare in this occupation — lead with these, and say what you built with them.
What the occupation pays Median $164,459 (middle half $130,334–$195,752).
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.
Why we read it this way (7)
The posting covers two levels simultaneously: Senior FPGA Engineer I (5+ years required) and Senior FPGA Engineer II (8+ years required). The overall years minimum is set to 5, the lower gate. A candidate with 8+ years would qualify for the higher level.
U.S. citizenship is a hard requirement due to program requirements, but no specific security clearance is stated as a gate — clearance is set to None accordingly.
The Bachelor's degree requirement explicitly lists electrical, computer, or software engineering (or other engineering degree) with no 'or equivalent experience' language, so it is treated as a hard requirement.
FPGA firmware development is listed as a named discipline/skill with a specific years gate (5+ for Level I, 8+ for Level II) under the required qualifications sections; it is retained as a skill because it names a concrete technical domain rather than a generic concept.
All 'Nice to Have' items — including Xilinx/Microchip tools, UVM/VUnit, SDR/DSP, interface protocols (SPI/UART/I2C/CAN, GigE/PCIe), embedded software, Git, JIRA, and CI/CD — are listed under the explicit 'THESE QUALIFICATIONS WOULD BE NICE TO HAVE' heading and are marked preferred.
SOC classification is Medium confidence: FPGA firmware engineering sits at the intersection of hardware and software development. 15-1252 (Software Developers) is chosen because the primary deliverable is firmware/HDL code; 15-1299 (Computer Occupations, All Other) is the runner-up given the embedded/hardware nature of the work.
Ignored 1 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): FPGA firmware development.
Read the full posting
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