Microsoft Corporation · Mountain View, CA

Salary
$119,800–$234,700from the description
Posted
Jul 25, 2026
Location
Mountain View, CA
Last confirmed open
Jul 28, 2026

What this job asks for AI summary

A hardware design verification engineer role on Microsoft's AI Silicon Engineering (AISiE) SoC team, focused on building and validating pre- and post-silicon verification environments for custom cloud hardware. Day-to-day work spans developing UVM/SystemVerilog testbenches, constrained-random tests, functional coverage models, and emulation flows on platforms such as Zebu and Palladium. The role suits engineers with deep SoC/IP verification experience who are comfortable working across chip, block, and system levels in a large cross-functional organization.

Senior level · 5+ years · Seattle-Tacoma-Bellevue, WA · Full-time

Nice to have (8)
SystemVerilogUVMVerilog · 3+ yrsC++ or C · 3+ yrsPython, Ruby or PerlZebu or PalladiumFPGAsMakefile

“or” means any one of them counts — you don't need all of them.

We read this from the posting text with AI. Skim the description below before ruling yourself out.

How this req sits in the market our data

Roughly 95 people in the Seattle-Tacoma-Bellevue, WA area plausibly meet what this posting asks for (software developers). range 20–150

Applicant volume Moderate — A normal amount of company. The rare requirements below are what will separate a shortlisted application from the rest.

What gives you an edge
Uvm1%Systemverilog2%Verilog3%

Rare in this occupation — lead with these, and say what you built with them.

What won't set you apart
Python51%

Most people in this occupation already list these. Still required — just not what gets you shortlisted.

What the occupation pays Median $170,959 (middle half $135,720–$216,519). This posting is about at that midpoint.

Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.

Why we read it this way (6)

No skills are listed under a hard-requirements section — the Required Qualifications block specifies only degree/experience thresholds, not named technologies. All named technologies appear exclusively under Preferred Qualifications and are therefore marked preferred.

The overall years minimum is set to 5, reflecting the lowest qualifying path stated (Bachelor's + 5 years); the Doctorate path requires only 1 year, but 5 years represents the most common qualifying threshold.

The degree requirement is None because the JD explicitly accepts 'equivalent experience' as an alternative to any of the listed degrees.

The posting lists a higher pay band for San Francisco Bay Area and New York City metro ($160,200–$261,000/year); the figures captured reflect the standard U.S. range.

The role is classified as Software Developers (15-1252) because the primary work is writing and shipping verification code (testbenches, UVM environments, automation scripts, emulation models). 15-1299 is noted as a runner-up given the specialized hardware/EDA nature of the work.

Location is inferred as the Seattle/Redmond area (Microsoft HQ); the posting does not explicitly state a city but references U.S.-wide pay ranges and Microsoft's standard corporate location context. No remote option is indicated.

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