Senior Director Power Architecture, Datacenter AI at Qualcomm
San Diego, CA
$249,900–$375,800from the description
Aug 10, 2026
San Diego, CA
Sep 24, 2026
What this job asks for AI summary
This role leads pre- and post-silicon power analysis and validation for Qualcomm's data center AI accelerator SoCs, spanning IP, SoC, card, and rack scale. The engineer defines power targets and optimization strategies, characterizes datacenter workloads, debugs silicon issues across bring-up and production phases, and feeds real-silicon findings back into next-generation architecture planning. It suits a seasoned ASIC/SoC power specialist with deep datacenter and AI infrastructure experience.
Senior level · 10+ years · Bachelor's required · Full-time
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Most people in this occupation already list these. Still required — just not what gets you shortlisted.
What the occupation pays Median $119,144 (middle half $81,115–$160,963). This posting is about at that midpoint.
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Aug 12, 2026. It is a model, not a headcount.
Why we read it this way (8)
The job location is not specified in the posting; no CBSA or state could be determined. Qualcomm's primary US engineering hub is San Diego, CA, but this cannot be confirmed from the text alone.
The minimum degree requirement is a Bachelor's in Science, Engineering, or a related field; however, the JD explicitly accepts equivalent advanced degrees with fewer years of experience, so the hard gate is a Bachelor's (or higher).
Total years minimum is set to 10, reflecting the lowest threshold stated (Bachelor's + 10 years); Master's holders need 9 years and PhD holders need 8 years.
SOC classification is uncertain: the role is primarily a silicon validation and power engineering discipline that sits between hardware engineering and software/computer occupations. 15-1299 (Computer Occupations, All Other) is the closest fit; 15-1252 (Software Developers) is the runner-up given the scripting and tool-development responsibilities.
Most skills appear under 'Preferred Qualifications' and are therefore marked as preferred. The only hard-gated technical domain from the Minimum Qualifications section is ASIC design/verification/validation experience, which is captured as required. Specific named tools (C/C++, Python, etc.) appear only under Preferred Qualifications.
Several preferred qualifications describe domain knowledge or methodologies rather than specific named technologies (e.g., 'strong analytical skills', 'communication skills', 'AI SoC memory hierarchy understanding') and are omitted per extraction rules.
Compensation range of $249,900–$375,800/year is stated; additional discretionary bonus and RSU grants are mentioned but not quantified.
Ignored 4 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): ASIC design, SoC architecture, power analysis, power management.
Read the full posting
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