Embedded Software Engineer - Real-Time Systems & Multicore at Jobgether
$100,000–$140,000from the description
Jul 14, 2026
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Jul 21, 2026
What this job asks for AI summary
This role centers on building low-level embedded software for safety-critical aerospace and defense systems, with a focus on deterministic real-time execution across multicore processor architectures. Day-to-day work spans writing C, C++, and assembly code, performing timing analyses such as WCET and DCCC evaluations, supporting DO-178C Level A certification activities, and integrating FPGA/ASIC interfaces. It suits an experienced embedded engineer comfortable working close to the hardware in rigorous, certification-driven environments.
Mid level · 4+ years · Remote · Bachelor's required · Full-time
“or” means any one of them counts — you don't need all of them.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Roughly 6,700 people nationally plausibly meet what this posting asks for (software developers). range 1,350–10,000
Applicant volume Moderate — A normal amount of company. The rare requirements below are what will separate a shortlisted application from the rest.
Rare in this occupation — lead with these, and say what you built with them.
Most people in this occupation already list these. Still required — just not what gets you shortlisted.
What the occupation pays Median $138,970 (middle half $107,524–$175,762). This posting is about at that midpoint.
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.
Why we read it this way (6)
The title carries no seniority level word; advertised seniority is Unspecified. The 4+ years requirement and scope (individual contributor, team-embedded) support a Mid band — the work is technically deep but the JD does not describe org-wide or cross-team architectural authority.
U.S. citizenship is explicitly required by the posting. This is a hard gate but is not a formal security clearance; the clearance requirement is set to None. Security clearance eligibility is listed only under preferred experience.
S32 processor families ('or similar ARM-based multicore platforms') and automated testing frameworks appear under preferred experience and are marked accordingly.
FPGA and ASIC are listed together as a single interface requirement; ASIC is captured as an alternative to FPGA.
The posting is listed via Jobgether on behalf of an unnamed partner company; the actual employer is not identified.
Caller marked this a fully-remote role — scored against the national candidate pool.
Read the full posting
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