ASIC FPGA Engineer (New Hire Sign On Bonus Eligible) at General Dynamics Mission Systems, Inc
Bloomington, MN
$114,189–$120,750from the description
Jul 13, 2026
Bloomington, MN
Jul 21, 2026
What this job asks for AI summary
This role centers on FPGA development within a defense-focused engineering environment, covering the full design lifecycle — from architecture definition and module interface specification through synthesis, place-and-route, timing analysis, and verification. The position suits an electrical or computer engineering professional with hands-on ASIC/FPGA design experience who can work with meaningful independence. A U.S. government Secret clearance eligibility is required.
Mid level · 2+ years · National · Bachelor's required · Secret clearance · Full-time
Posted 2 times — it's one opening, so apply once.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
Why we read it this way (6)
The role is FPGA/ASIC hardware design engineering — not traditional software development. 15-1252 (Software Developers) is used as the closest available code because the work involves digital logic design, simulation, synthesis, and verification, which is the hardware-design analog of software engineering. 15-1299 (Computer Occupations, All Other) is a plausible alternative.
The minimum experience requirement is 2 years with a Bachelor's degree, or 6 months with a Master's degree; 2 years is used as the overall years minimum per the lower-bound rule.
Clearance is listed as 'ability to obtain' a Secret clearance, not an active clearance already held — but the JD explicitly gates on this at time of hire, so it is treated as a hard requirement.
SystemVerilog is explicitly labeled 'preferred' in the posting.
HDL synthesis, place-and-route, and timing analysis are described as core responsibilities under the required qualifications section; these are captured under the FPGA/ASIC skill entries rather than as separate generic methodology skills, since no specific named tool (e.g., Vivado, Quartus) is called out.
Requires a Secret clearance — the cleared population is a small fraction of this occupation, so the real candidate pool is materially smaller than the estimate below, which does not model clearance.
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