Staff FPGA Engineer (Future Forward) at Intuitive
Sunnyvale, CA
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Jul 21, 2026
Sunnyvale, CA
Jul 23, 2026
What this job asks for AI summary
A staff-level FPGA engineering role focused on designing, implementing, and verifying complex FPGA logic for robotic surgical systems. Day-to-day work spans RTL design in SystemVerilog across areas such as video processing, motor control, high-speed communications, and sensor integration, through to simulation, hardware debugging, and product release. Suits a deeply experienced FPGA engineer comfortable leading technical design on a small, cross-functional team in a regulated medical-device environment.
Staff level · 8+ years · San Jose-Sunnyvale-Santa Clara, CA · Bachelor's required · Full-time
“or” means any one of them counts — you don't need all of them.
Posted 2 times — it's one opening, so apply once.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Roughly 60 people in the San Jose-Sunnyvale-Santa Clara, CA area plausibly meet what this posting asks for (software developers). range 20–110
Applicant volume Light — Few people clear these requirements, so an application that does clear them gets looked at. Worth applying to even if you miss a nice-to-have.
Rare in this occupation — lead with these, and say what you built with them.
Most people in this occupation already list these. Still required — just not what gets you shortlisted.
What the occupation pays Median $217,796 (middle half $177,469–$231,052).
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.
Why we read it this way (9)
The role is titled 'Staff FPGA Engineer' and the title explicitly claims Staff level. The actual requirements (8–15 years depending on degree, cross-team technical leadership, architecture ownership) genuinely support Staff-level classification.
The experience requirement is tiered by degree: BSc + 15 years, Master's + 12 years, or PhD + 8 years. The overall years minimum is set to 8 (the lowest qualifying threshold, per PhD path).
Degree requirement is set to Bachelors — the JD lists a BSc as one of three qualifying paths. A degree is clearly required; equivalent experience without a degree is not offered as an alternative.
FPGA engineering sits at the boundary of hardware and software; 15-1252 (Software Developers) is used because the role centers on writing and verifying RTL/HDL code and building complex digital designs, which BLS maps to software development. 15-1299 (Computer Occupations, All Other) is noted as a plausible alternative given the hardware-adjacent nature of FPGA work.
No compensation figures were published in the posting despite a reference to 'target compensation ranges are listed' — likely a copy/paste artifact; no comp fields are populated.
Python, Tcl, Perl, and Shell are listed together as interchangeable scripting options ('like Python, Tcl, Perl, or Shell'); Python is used as the primary name with the others in alternatives.
Git and SVN are listed as interchangeable version control options; Git is used as the primary name with SVN in alternatives.
Location is inferred as Intuitive Surgical's headquarters in Sunnyvale, CA (San Jose-Sunnyvale-Santa Clara CBSA). The posting does not explicitly state a city but Intuitive's primary engineering campus is there.
Ignored 2 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): RTL design, FPGA design.
Read the full posting
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