Design Verification Engineer at Microsoft
Mountain View, CA
—
Aug 18, 2026
Mountain View, CA
Sep 25, 2026
What this job asks for AI summary
A hardware/pre-silicon verification engineering role focused on building and running constrained-random and formal verification environments for IPs, sub-systems, and SoCs. The work spans UVM testbench development, functional coverage closure, chip bring-up support, and test firmware writing. Suited to candidates with a background in SystemVerilog/UVM, formal methods, and some low-level software (C/C++, assembly, scripting).
Mid level · 2+ years · Bachelor's required · Full-time
“or” means any one of them counts — you don't need all of them.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Rare in this occupation — lead with these, and say what you built with them.
Most people in this occupation already list these. Still required — just not what gets you shortlisted.
What the occupation pays Median $138,970 (middle half $107,524–$175,762).
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Aug 20, 2026. It is a model, not a headcount.
Why we read it this way (4)
The degree requirement accepts a Master's + 1 year OR a Bachelor's + 2 years OR equivalent experience. Because equivalent experience is explicitly offered as an alternative path, the minimum formal degree is treated as a Bachelor's — the lowest named degree — though in practice no degree may be strictly required.
Export-control language requires proof of US citizenship, permanent residency, refugee/asylee status, or other protected status as a condition of employment; this is not a security clearance but does restrict the eligible candidate pool.
Formal verification tools are required ('industry leading formal tools') but no specific product (e.g., Cadence JasperGold, Synopsys VC Formal) is named in the posting.
The SOC classification is a judgement call: this role is primarily hardware/RTL verification engineering, which sits closest to Software Developers (15-1252) given the heavy coding component (UVM, C/C++, scripting), though 15-1299 (Computer Occupations, All Other) is a reasonable alternative for a dedicated pre-silicon verification specialty.
Read the full posting
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