ASIC Design Verification Engineer (Hardware Security) at Qualcomm
Santa Clara, CA
$153,200–$229,800from the description
Jul 13, 2026
Santa Clara, CA
Jul 21, 2026
What this job asks for AI summary
An ASIC hardware design role focused on security features within premium mobile SoC products. Day-to-day work spans the full chip development lifecycle — from architecture and RTL design through synthesis, timing closure, and silicon testing — with particular emphasis on hardware security mechanisms such as cryptographic engines, root-of-trust blocks, and side-channel countermeasures. Suits experienced digital design engineers comfortable working across cross-functional teams on complex, security-critical subsystems.
Senior level · 6+ years · San Diego, CA · Bachelor's required · Full-time
“or” means any one of them counts — you don't need all of them.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Rare in this occupation — lead with these, and say what you built with them.
What the occupation pays Median $166,860 (middle half $131,418–$198,246). This posting is about at that midpoint.
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.
Why we read it this way (6)
The role is hardware/ASIC design engineering — not software development in the traditional sense. 15-1252 (Software Developers) is the closest available SOC code for digital hardware design engineers; 15-1299 (Computer Occupations, All Other) is a plausible alternative given the specialized ASIC/chip design nature of the work.
The main Qualifications section states '6+ years of experience in ASIC design', while the Minimum Qualifications block at the bottom sets a lower floor (4 years with a Bachelor's, 3 with a Master's, 2 with a PhD). The higher '6+ years' figure from the primary qualifications section is used for total experience, as it represents the practical bar the team is hiring to.
The 'Stand out of the crowd' section is treated as preferred/nice-to-have throughout, as it is explicitly framed as differentiating rather than gating criteria.
The degree requirement is Bachelor's minimum per the explicit 'Bachelor's degree minimum' statement; Master's or PhD are preferred but not required.
Compensation is stated as an annual pay range of $153,200–$229,800, plus discretionary bonus and RSU grants.
Ignored 3 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): ASIC design, RTL design, side-channel analysis.
Read the full posting
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