FPGA Intern – Custom Compute Hardware at Ludwig Computing
Mill Valley, CA
$41,600–$83,200
Jul 28, 2026
Mill Valley, CA
Jul 29, 2026
What this job asks for AI summary
An internship at an early-stage AI hardware startup focused on FPGA-based prototyping and hardware bring-up for custom compute accelerators. The intern will design, simulate, and validate processing modules in RTL or HLS, run timing and area analysis, and help integrate hardware/software boundaries. The role suits students in EE or CS with hands-on digital design experience who want exposure to ASIC-relevant flows and accelerator architecture.
Junior level · Internship
“or” means any one of them counts — you don't need all of them.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Rare in this occupation — lead with these, and say what you built with them.
What the occupation pays Median $138,970 (middle half $107,524–$175,762).
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 29, 2026. It is a model, not a headcount.
Why we read it this way (7)
The posting is for an internship targeting students currently pursuing a degree in EE or CS — no minimum degree is hard-required for hire.
Verilog, SystemVerilog, VHDL, and C++ (for HLS) are listed together as interchangeable RTL/design entry options under Requirements; they are captured as one skill with alternatives.
Vivado and Quartus are listed as interchangeable FPGA toolchain options under Requirements.
OpenCL, FPGA boards, hardware/software co-design, and ASIC design concepts all appear under the 'Bonus if You Have' section and are marked preferred accordingly.
SOC classification is Medium confidence: FPGA/RTL design sits at the boundary between hardware engineering and software development; 15-1252 (Software Developers) is the closest available code given the RTL/HLS coding emphasis, with 15-1299 (Computer Occupations, All Other) as a reasonable alternative for the hardware-design dimension.
Ignored 3 non-technology phrase(s) as skills (responsibilities/concepts, not named tools): FPGA development, hardware/software co-design, ASIC design.
Posting is for a internship engagement — the market benchmarks below price full-time roles, so read the comp comparison with that in mind.
Read the full posting
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