Verification Engineer, Emulation and Prototyping
NVIDIA Corporation · Santa Clara, CA
$136,000–$264,500from the description
Jul 9, 2026
Santa Clara, CA
Jul 20, 2026
What this job asks for AI summary
This role centers on building and optimizing hardware emulation and FPGA prototyping environments for next-generation GPUs, SoCs, NICs, and switches. Day-to-day work involves making RTL emulation-ready, running synthesis and place-and-route flows, developing C/C++ testbenches and transactors, debugging designs on emulation platforms, and enabling pre-silicon software and firmware validation. It suits engineers with solid hands-on experience in FPGA/emulation tools and verification methodologies.
Senior level · 3+ years · San Jose-Sunnyvale-Santa Clara, CA · Full-time
“or” means any one of them counts — you don't need all of them.
Posted 2 times — it's one opening, so apply once.
We read this from the posting text with AI. Skim the description below before ruling yourself out.
How this req sits in the market our data
Rare in this occupation — lead with these, and say what you built with them.
What the occupation pays Median $170,192 (middle half $126,400–$188,281). This posting is about at that midpoint.
Estimated from BLS employment for this occupation and area, per-skill prevalence across our listing corpus, and published wage benchmarks — as of Jul 28, 2026. It is a model, not a headcount.
Why we read it this way (7)
The role spans both verification/validation (DV testbenches, emulation bring-up, debug) and software/infrastructure development (C/C++ transactors, DPI/PLI interfaces, scalable validation environments), making it a genuine hybrid between 15-1253 (QA/Verification) and 15-1252 (Software Developers). 15-1253 was chosen as the primary code because the core mission is pre-silicon hardware verification and validation.
Two salary bands are posted: $136,000–$218,500 (Level 3) and $168,000–$264,500 (Level 4). The min/max reported here span both bands combined ($136,000–$264,500).
Experience requirement is stated as 'BS with 5+ years OR MS with 3+ years'; the overall years minimum is set to 3 (the lower bound when a higher degree is held). The BS path would imply 5 years minimum.
ProtoCompiler, Synplify Premier, and Xilinx Vivado appear in the required section but are introduced with 'Familiarity with', which softens them relative to the firmly-gated emulation platform experience; they are marked preferred accordingly.
CXL, CHI, NVLINK, USB, and CPU-GPU coherency are listed as protocol knowledge under requirements, but the posting uses 'Understanding of' rather than firm gating language. PCIe is retained as a hard gate given its prominence; the others are marked preferred.
The 'Ways to stand out from the crowd' section is treated as the preferred/nice-to-have block (Synopsys HAPS prior experience, Python, Perl, performance-sensitive validation methodologies, Cadence/Synopsys/Siemens transactor solutions).
The mention of 'Use agentic, Claude to improve coding' in the preferred section appears to be a reference to the Claude AI assistant as a productivity tool; it names no scoreable technology skill and was omitted from the skills list.
Read the full posting
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